PI74AVC+16820AAE【PDF 4/11 页】IC FLIP FLOP 3ST 10BIT 56TSSOP

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Sheet目录2040

1页 2页 3页 [4页]5页 6页 7页 8页

PI74AVC+16820A

2.5V 10-Bit Flip-Flop

w/Dual and 3-State Outputs

PS8696E

06/09/06

Notes:

1. H = High Signal Level, L = Low Signal Level,

X = Irrelevant; Z = High Impedance, Qo = Output Level before the

indicated steady-state conditions were established.

Maximum Ratings

(Above which the useful life may be impaired. For user guide-

lines, not tested.)

Supply voltage range, VCC......................................–0.5V to +4.6V

Input voltage range, VI .............................................–0.5V to +4.6V

Voltage range applied to any output in the

high-impedance or power-off state, VO(1)........–0.5V to +4.6V

Voltage range applied to any output in the

high or low state, VO(1,2)...........................–0.5V to VCC +0.5V

Input clamp current, IIK (VI <0)..................................... –50mA

Output clamp current, IOK (VO <0)................................ –50mA

Continuous output current, IO ........................................±50mA

Continuous current through each VCC or GND ...........±100mA

Package thermal impedance, θJA(3): package A............82°C/W

package K............85°C/W

Storage Temperature range, Tstg....................... –65°C to 150°C

Notes:

Stresses greater than those listed under MAXIMUM RAT-

INGS may cause permanent damage to the device. This is a

stress rating only and functional operation of the device at

these or any other conditions above those indicated in the

operational sections of this specification is not implied. Ex-

posure to absolute maximum rating conditions for extended

periods may affect reliability.

1. Input & output negative-voltage ratings may be exceeded if the input

and output curent rating are observed.

2. Output positive-voltage rating may be exceeded up to 4.6Vmaximum

if the output current rating is observed.

3. The package thermal impedance is calculated in accordance with

JESD 51.

Truth Table each Flip-Flop(1)

Inputs

Outputs

OEn

CLK

↑

Pin Description

Pin Name

Description

Output Enable Input (Active LOW)

CLK

Clock Input (Active HIGH)

3-State Outputs

Data Inputs

GND

Ground

VCC

Power

06-0173

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